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Feb 05, 2025
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2024-2025 Undergraduate Catalog
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CDA 4213L - CMOS-VLSI Design Lab
Credit(s): 1
Scalable CMOS layout design, circuit extraction, transistor-level and lay-out level simulation, SPICE parameters/modeling, transistor sizing, standard and macro-cell based layout, static/dynamic CMOS, combinational/sequential block layout, memory I/O design.
Prerequisite(s): CDA 3201 (min grade C-), CDA 3201L (min grade C-)
Corequisite(s): CDA 4213 (min grade C-)
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